ECE: Electrical & Computer Engineering
Secure Hardware

Hardware Security:
Building Tamper-Resistant Cryptography


Content Audience Instructor Venue
CESCA Logo
Short Course Series
Registration

Date:
6/18-6/20, 2012 Location:
Arlington, VA Contact:
Patrick Schaumont
schaum@vt.edu

Course Information

Hardware Security: Building Tamper-Resistant Cryptography
describes hardware design techniques for security-critical
operations, such as data encryption or key generation.
The widespread use of programmable hardware platforms and
reconfigurable hardware has made secure hardware design a viable,
trustworthy alternative to software. Secure hardware is particularly useful
when high-performance, low-power operation, and/or trustworthiness of a design is critical.

A related course, Hunting for Software Bugs: Software Correctness and Security will address formal and informal methods for software assurance.

The two-and-a-half day course (Monday morning until Wednesday noon) on Hardware Security introduces the key concepts in secure hardware design, including the major technologies for secure hardware, design techniques for cryptographic implementations, and design techniques for trustworthiness. The lectures combine theory with practical hands-on sessions in a computer lab.

Participants will receive course lecture materials, and the design examples from the hands-on sessions.

Course Content

The two-and-a-half day course handles three major topics.

Day 1: Symmetric-key Cryptographic Hardware

  • Finite Field Arithmetic in hardware
  • Block Ciphers: Advanced Encryption Standard
  • Hardware/Software Interfaces
  • Handson: Design of a Cryptographic Coprocessor

Day 2: Public-key Cryptographic Hardware, and Implementation Attacks

  • Public-key Elliptic-Curve based Cryptography
  • Implementation Attacks: Side-channel Analysis
  • Implementation Attacks: Fault Attacks
  • Handson: Side-channel Analysis of AES

Day 3: Cryptographic Hash, and Attack Countermeasures

  • Hash functions and SHA-3
  • Countermeasures against Implementation Attacks

Target Audience

The course is targeted at a broad audience in Electronic Engineering. No specific background in Cryptography is needed. Potential participants may include:
  • Designers with a need for design trustworthiness in their application, such as data encryption, trustworthy operation, and intellectual property protection.
  • Managers involved in product definition in the field of information security, in particular products with an embedded or constrained form factor.
  • Students, researchers and practitioners in secure embedded system design.

About the Instructor

Patrick Schaumont is Associate Professor in Computer Engineering at Virginia Tech. He received the PhD degree in Electrical Engineering from UCLA (2004). At Virginia Tech, he is leading the Secure Embedded Systems group. His research, supported by NSF and NIST, covers design and methodologies for secure embedded systems. He has served on the program committee of international conferences in this field such as CHES, DATE, DAC, IEEE HOST and IEEE MEMOCODE, and as guest editor for IEEE Design and Test Magazine, ACM Transactions on Reconfigurable Technology and Systems, and IEEE Transactions on Computer-Aided Design of Integrated Circuits. He has published over 100 papers, a book, and 4 patents. He is a senior member of the IEEE.

Patrick Schaumont

Course Dates and Location

Valid HTML 4.0 Transitional