Publications
From Gezel2
Contents |
GEZEL Design Technology
- P. Schaumont, I. Verbauwhede, "A Component-based Design Environment for Electronic System-level Design," IEEE Design and Test of Computers Magazine, special issue on Electronic System-Level Design, September-October 2006. [PDF]
- P. Schaumont, D. Ching, I. Verbauwhede, "An interactive codesign environment for domain-specific coprocessors," ACM Transactions on Design Automation for Embedded Systems, January 2006. [PDF]
- P. Schaumont, S. Shukla, I. Verbauwhede, "Design with Race-free Hardware Semantics", 2006 Design Automation and Test in Europe Conference (DATE06).[PDF]
- P. Schaumont, I. Verbauwhede, "The descriptive power of GEZEL," Technical Report, Jan 30, 2005. [PDF]
- P. Schaumont, I. Verbauwhede, "Interactive Cosimulation with Partial Evaluation, 2004 Design Automation and Test in Europe (DATE 2004), Februari 2004. [PDF] [Examples]
- P. Schaumont, I. Verbauwhede, "Domain-specific tools and methods for application in security processor design", Kluwer Journal for Design Automation of Embedded Systems, pp. 365-383, November 2002. [PDF]
Verification
- M. R. Hansen, J. Madsen and A. Wiid Brekling, "Semantics and Verification of a Language for Modeling Hardware Architectures," Formal Methods and Hybrid Real-Time Systems 2007, Lecture Notes on Computer Science 4700, Springer 2007. [PDF]
- M. Backes, B. Kopf, "Formally Bounding the Side-Channel Leakage in Unknown-Message Attacks," IACR ePrint archive 2008/162 [PDF]
- B. Köpf and D. Basin: An Information-Theoretic Model for Adaptive Side-Channel Attacks. 14th ACM Conference on Computer and Communications Security (CCS '07). [PDF]
- B. Koepf and D. Basin, "Timing-Sensitive Information Flow Analysis for Synchronous Systems," Technical Report 526, ETH Zürich, Information Security, 07 2006. [PDF]
Design Methodology
- Sumit Ahuja, Deepak A. Mathaikutty and Sandeep Shukla, Model-based Power Estimation using Least Squares Regression on FSMD Models. FERMAT Technical Report 2008-02, 2008. [PDF]
- K. Sakiyama, E. De Mulder, B. Preneel, and I. Verbauwhede, "Side-channel Resistant System-level Design Flow for Public-key Cryptography," In Proceedings of the 2007 Great Lakes Symposium on VLSI (GLSVLSI 2007), pp. 144-147, 2007. [PDF]
- K. Tiri, P. Schaumont, "Changing the odds against masked logic," 13th Annual Workshop on Selected Areas in Cryptography, Montreal, Canada, 2006. [PDF]
- P. Yu, P. Schaumont, "Executing Hardware as Parallel Software for Picoblaze Networks," 16th International Conference on Field Programmable Logic and Applications (FPL 2006), Madrid, Spain, August 2006. [PDF]
- D. Hwang, P. Schaumont, S. Yang, I. Verbauwhede, "Multi-level Design Validation in a Secure Embedded System," Proceedings of the 2005 High Level Design Validation and Test Workshop. [PDF]
- P. Schaumont, D. Hwang, I. Verbauwhede, "Platform-based design for an embedded fingerprint authentication device," IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems. [PDF]
Education
- P. Schaumont, "A Senior-Level Course in Hardware-Software Codesign," Micro-electronic System Education Conference (MSE), June 2007. [PDF]
- P. Schaumont, and I. Verbauwhede, "Hardware/software co-design for stream ciphers," In ECRYPT Workshop, SASC - The State of the Art of Stream Ciphers, pp. 106-116, 2007. [PDF]
- I. Verbauwhede, P. Schaumont, "Skiing the embedded systems mountain," ACM Transactions on Embedded Computing Systems, Vol.4, Issue 3, pp.529-548, 2005. [PDF]
- K. Sakiyama, P. Schaumont, D. Hwang, and I. Verbauwhede, "Teaching trade-offs in system-level design methodologies," Proc. IEEE International Conference on Microelectronics Systems Education (MSE 2003), pp. 62-63, June 2003. [PDF]
Embedded Software
- Y. Matsuoka, P. Schaumont, K. Tiri, and I. Verbauwhede, "Java cryptography on KVM and its performance and security optimization using HW/SW co-design techniques," Proc. Int. Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2004), pp. 303-311, September 2004. [PDF]
- P. Schaumont, K. Sakiyama, A. Hodjat, I. Verbauwhede, "Embedded software integration for coarse-grain reconfigurable architectures," 2004 Reconfigurable Architectures Workshop (RAW 2004), April 2004. [PDF]
Crypto Coprocessors
- X. Guo, Z. Chen, P. Schaumont, "Energy and Performance Evaluation of an FPGA-based SoC Platform with AES and PRESENT Coprocessors", International Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS 2008), July 2008.
- M. Knezevic, K. Sakiyama, Y. K. Lee, and I. Verbauwhede, "On the High-Throughput Implementation of RIPEMD-160 Hash Algorithm," In Proceedings of the IEEE 19th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2008), 6 pages, 2008 [PDF]
- K. Sakiyama, L. Batina, B. Preneel, and I. Verbauwhede, "HW/SW Co-design for Public-Key Cryptosystems on the 8051 Micro-controller," Computers and Electrical Engineering 33(2007), pp. 324-332, 2007. [PDF]
- K. Sakiyama, L. Batina, B. Preneel, and I. Verbauwhede, "Multi-core Curve-based Cryptoprocessor with Reconfigurable Modular Arithmetic Logic Units over GF(2n)," IEEE Transactions on Computers 56(9), pp. 1269-1282, 2007. [PDF]
- L. Batina, A. Hodjat, D. Hwang, K. Sakiyama, and I. Verbauwhede, "Reconfigurable architectures for curve-based cryptography on embedded micro-controllers," In 16th International Conference on Field Programmable Logic and Applications (FPL 2006), IEEE, 4 pages, 2006. [PDF]
- K. Sakiyama, L. Batina, B. Preneel, and I. Verbauwhede, "Superscalar Coprocessor for High-speed Curve-based Cryptography," In Cryptographic Hardware and Embedded Systems - CHES 2006, Lecture Notes in Computer Science 4249, L. Goubin, and M. Matsui (eds.), Springer-Verlag, pp. 415-429, 2006. [PDF]
- Y.K. Lee, H. Chan and I. Verbauwhede, "Throughput Optimized SHA-1 Architecture Using Unfolding Transformation," IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP), pp.354-359, Steamboat Springs, Colorado, September 2006. [PDF]
- H. Chan, P. Schaumont, I. Verbauwhede, "Process Isolation for Reconfigurable Hardware," 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, June 2006. [PDF]
- S. Yang, P. Schaumont, and I. Verbauwhede, "Microcoded Coprocessor for Embedded Secure Biometric Authentication Systems," IEEE/ACM/IFIP International Conference on Hardware - Software Codesign and System Synthesis(CODES+ISSS'05), Sept. 2005. [PDF]
- A. Hodjat, L. Batina, D. Hwang, I. Verbauwhede, "A Hyperelliptic Curve Cryto Coprocessor for an 8051 Microcontroller," IEEE Workshop on Signal Processing Systems (SIPS 2005), November 2005. [PDF]
- T. Hjorth, "Supporting Privacy in RFID Systems," Denmark Technical University Masters' Thesis, 2004. [WWW]
Multiprocessors and Network-on-Chip
- E. Simpson, P. Yu, P. Schaumont, S. Ahuja, S. Shukla, "VT Matrix Multiply Design for MEMOCODE 07," Fifth ACM-IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE'2007), Nice, France.[PDF]
- B.C. Lai, P. Schaumont, I. Verbauwhede, "Energy and Performance Analysis of Mapping Parallel Multi-threaded Tasks for An On-Chip Multi-Processor System," IEEE International Conference on Computer Design (ICCD 2005), pp.102-104, October 2005. [PDF]
- P. Schaumont, B.C. Lai, W. Qin, I. Verbauwhede, "Cooperative multithreading on embedded multiprocessor architectures enables energy-scalable design," Proc. 2005 Design Automation Conference (DAC 2005), June 2005. [PDF]
- D. Ching, P. Schaumont, I. Verbauwhede, "Integrated Modeling and Generation of A Reconfigurable Network-On-Chip", International Journal on Embedded Systems, Vol 1, Nos 3-4, 2005, p. 218-227. [PDF]
VLSI
- D. Hwang, K. Tiri, A. Hodjat, B.C. Lai, S. Yang, P. Schaumont, I. Verbauwhede, "A AES-Based Security Coprocessor IC in 0.18-um CMOS with Resistance to Differential Power Analysis Side-Channel Attacks," IEEE Journal of Solid-State Circuits (JSSC). [PDF]
