The study of variability in silicon devices is becoming increasingly critical in many areas of circuit design with gradual scaling down of the process technology. It is not only helpful in designing PUFs as well as other variability-aware circuits. Though variability models can be used to simulate the variability behavior of a chip, on-chip measurements provide more accuracy. However, on-chip data from a significantly large population of chips are not easily available.
We, the Secure Embedded System (SES-VT) group of the ECE Department at Virginia Tech, have conducted a large scale experiment to measure on-chip variability in a 90-nm FPGA device based on ring oscillator. We conducted our experiment on a large population of Xilinx Spartan (XC3S500E) FPGAs owned by the undergraduate and graduate students in Computer Engineering at Virginia Tech. Besides using the collected dataset for our own research effort, we also make the dataset publicly available on the web for the researches who may utilize it for their work. The detail of the measurement set up can be found here.
Combined DatasetThe combined dataset is available for download here.
2) Script for PUF Performance Evaluation and Comparison
For a systematic evaluation and comparison of PUF performances, we have created a Matlab script that accepts PUF responses in binary format and then produces the comparison results. This file can be downloaded using the following link. Any feedback/comments on the script will be greatly appreciated.
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This work is sponsored by National Science Foundation (NSF) grant no 0855095 and grant no 0964680.